Vijay Nath Editor

Dr. Vijay Nath was born in Gorakhpur (U.P.) India in 1976. He received his Bachelor degree in Physics and Master degree in Electronics from DDU Gorakhpur University, India in 1998 and 2001, respectively. He also received PGDCN (GM) from MMMUT, Gorakhpur in 1999. He received his Ph.D. degree in VLSI Design & Technology from Dr. RML Avadh University, Faizabad in association with CEERI- Pilani in 2008. From 2000 to 2001, he was project trainee in IC Design Group, CEERI Pilani under guidance of Dr. K.S.Yadav (Senior Scientist). From 2002 to 2006, he severed as faculty in Department of Electronics, DDU University Gorakhpur. In 2006, he joined as a faculty in the Department of Electronics and Communication Engineering, Birla Institute of Technology Mesra Ranchi (JH) India. He is Professor In-charge of VLSI Design Lab BIT Mesra Ranchi. He is Faculty Advisor of NAPS, Advisor IEI Student Chapter(ECE) BIT Mesra and Honorary Secretary of IETE Ranchi Centre. He is a recipient of Vivekananda Techno Fiesta Award 2002, Young Scientist Award 2004, Cadence Design Contest 2013, 2014, CCSN Best Paper Award 2013, IEI Technical Contest Best Paper Award 2013. His research interests include analog, digital, mixed CMOS VLSI circuits, low power VLSI circuits, ADC, DAC, PTAT, CMOS bandgap voltage reference, ASICs, Embedded Systems Designs, Smart Cardiac Pacemaker, Smart Grids, Internet of Things, and early stage cancer detection.  He has to his credit around 110 publications in reputed Scopus & SCI journals and conferences. He has successfully completed three R&D projects funded by DST New Delhi, DRDL Hyderabad and MHRD New Delhi and one project is in ongoing stage funded by RESPOND ISRO Ahmadabad. He developed E-learning course of VLSI Design in Pedagogy pattern funded by MHRD New Delhi. Now, complete course is available in IIT Kharagpur official website and open for all IITs, NITs, BITs and technical universities. He is Editor of Proceeding of International Conference on Nanoelectronics, Circuits & Communication Systems (NCCS 2015) of Lecture Notes of Electrical Engineering, Springer. He is a member of several professional societies and academic bodies including IETE, ISTE, ISVE and IEEE. 

Prof. J.K. Mandal received his M.Sc. in Physics from Jadavpur University in 1986 and M. Tech. in Computer Science from University of Calcutta. Prof. Mandal was awarded Ph.D. in Computer Science and Engineering by the Jadavpur University in 2000. Presently, he is working as Professor of Computer Science and Engineering and former Dean, Faculty of Engineering, Technology and Management, Kalyani University, Kalyani, Nadia, West Bengal for two consecutive terms. He started his career as Lecturer at NERIST, Arunachal Pradesh in September 1988. He has teaching and research experience of 28 years. His areas of research include coding theory, data and network security, remote sensing and GIS based applications, data compression, error correction, visual cryptography, steganography, security in MANET, wireless networks and unify computing. He has produced 15 Ph.D. degrees, 2 submitted (2015-16) and 8 ongoing. He has supervised 3 M.Phils. and more than 50 M.Tech dissertations. He is a life member of the Computer Society of India since 1992, CRSI since 2009, ACM since 2012, IEEE since 2013 and Fellow member of IETE since 2012, Honorary Chairman of CSI Kolkata Chapter. He has chaired more than 30 sessions in various international conferences and delivered more than 50 expert/invited lectures during last 5 years. He has acted as program chair of many international conferences and edited more than 15 volumes of proceedings from Springer Series, Science Direct etc. He is reviewer of various international journals and conferences. He has over 360 articles and 6 books published to his credit. He is one of the editors for Springer AISC Series, FICTA 2014, CSI 2013, IC3T 2015, INDIA 2015, and INDIA 2016. He is also the corresponding editors of CIMTA 2013 (Procedia Technology, Elsevier), INDIA 2015 (AISC Springer) and ICIC2 2016 (AISC Springer).