Nano-Interconnect Materials and Models for Next Generation Integrated Circuit Design
3 contributors - Hardback
£120.00
Sandip Bhattacharya received the Ph.D. (Eng.) degree from Indian Institute of Engineering Science and Technology (IIEST), India in 2017. From October 2017 to December 2020, he worked as a postdoctoral researcher at the HiSIM research center, Hiroshima University, Japan. He is currently working as Associate Professor and Head of the Department of Electronics and Communication Engineering at SR University, Warangal, Telangana, India. His current research interests are nano device, interconnect modeling.
Ajayan J received his B.Tech Degree in Electronics and Communication Engineering from Kerala University in 2009, M.Tech and Ph.D. Degree in Electronics and Communication Engineering from Karunya University, Coimbatore, INDIA, in 2012 and 2017 respectively. He is an Associate Professor in the department of Electronics and Communication Engineering at SR University, Telangana, India. He has published more than 100 research articles in various journals and international conferences. He has published two books, more than 10 book chapters, and 2 patents. He is a reviewer of more than 30 journals in various publishers. He was the Guest Editor for several of the special issues. His areas of interest are microelectronics, semiconductor devices, nanotechnology, RF integrated circuits and photovoltaics.
Fernando Avila Herrera has worked in the field of academic and semiconductor industry. He has involved with the modeling and characterization of semiconductor devices, especially MOSFETs. Further, he has experience in device reliability modeling, model parameter extraction, Verilog-A, TCAD and EDA tools. He also has experience in HiSIM family models for parameter extraction and physics modeling and FPGAs programming. He has collaborated with different groups for developing compact models.