Hardware Architectures for Post-Quantum Digital Signature Schemes

Ramesh Karri author Deepraj Soni author Kanad Basu author Mohammed Nabeel author Najwa Aaraj author Marc Manzano author

Format:Paperback

Publisher:Springer Nature Switzerland AG

Published:28th Oct '21

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Hardware Architectures for Post-Quantum Digital Signature Schemes cover

This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification.  The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs.

  • Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;
  • Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;
  • Enables designers to build hardware implementations that are resilient to a variety of side-channels.
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ISBN: 9783030576844

Dimensions: unknown

Weight: 302g

170 pages