Designing Digital Computer Systems with Verilog

Sachin S Sapatnekar author David J Lilja author

Format:Paperback

Publisher:Cambridge University Press

Published:5th Nov '07

Currently unavailable, and unfortunately no date known when it will be back

This paperback is available in another edition too:

Designing Digital Computer Systems with Verilog cover

This book explains how to specify, design, and test a complete digital system using Verilog.

This is both an introduction to computer architecture and a guide to using a hardware description language (HDL) to design a simple processor. The authors demonstrate how behavioural and structural models can be developed using the popular Verilog HDL. For senior and graduate students, and practising engineers.This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined - this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.

ISBN: 9780521045728

Dimensions: 243mm x 168mm x 9mm

Weight: 297g

176 pages